Status byte register
The status byte register stores STB and RQS (MSS) messages as defined by the IEEE 488.1 standard. The status byte register can be read by using IEEE 488.1 serial polling or the IEEE 488.2 common command *STB?.
When the controller executes serial polling, bit 6 responds with request service (RQS). The status byte value is not changed by serial polling.
*STB? makes the PLZ-5W transmit the contents of the status byte register and the master status summary (MSS) message.
*STB? does not change the status byte, MSS, and RQS.
|Bit||Bit weight||Bit name||Description|
|0||1||Reserved||Reserved for future use by IEEE 488. The bit value is notified as zero.|
|2||4||Error/Event Queue||If data exists in the error or event queue, this bit is set to true.|
|3||8||Questionable Status Register (QUES)||This bit is set to true when a bit is set in the QUEStionable event status register and the corresponding bit in the QUEStionable status enable register is true.|
|4||16||Message Available (MAV)||This bit is set to true when a request is received from the digital programming interface and the PLZ-5W is ready to generate the data byte.|
|5||32||Standard Event Status Bit Summary (ESB)||This bit is set to true when a bit is set in the event status register.|
|6||64||Request Service (RQS)||This bit is set to true when a bit is set in the service request enable register and the corresponding bit exists in the status byte. The SRQ line of the GPIB is set.|
|Master Status Summary (MSS)||This bit is set to true when any bit in the status byte register is set to 1 and the corresponding bit in the service request enable register is set to 1.|
|7||128||Operation Status Register (OPER)||This bit is set to true when a bit is set in the OPERation event status register and the corresponding bit in the OPERation status enable register is set.|
|8-15||Not Used||Not used|